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- 22:56, 30 June 2021 diff hist +47 74F573 current
- 15:48, 26 June 2021 diff hist -165 74ALS175 current
- 10:49, 26 June 2021 diff hist +344 N 74F245 Created page with "= Octal Bidirectional Transceiver with 3-STATE Outputs = In the U18 board position this is used as a bi-directional transceiver for the 8 bit data bus. In the U19, 20, 21 po..." current
- 10:15, 26 June 2021 diff hist +390 N 74F573 Created page with "Due to chip packaging limitations in the 1970s, there was great effort to use the minimum number of pins for external connections. Intel multiplexed address & data buses, usi..."
- 09:22, 23 June 2021 diff hist +14 ISA Backplane →ISA Bus
- 09:21, 23 June 2021 diff hist 0 N File:ISA Bus pins.png current
- 22:36, 22 June 2021 diff hist +120 N 8259 Created page with "= PROGRAMMABLE INTERRUPT CONTROLLER = https://pdf1.alldatasheet.com/datasheet-pdf/view/66107/INTEL/8259A.html link" current
- 22:34, 22 June 2021 diff hist -39 8288 →The Intel 8288 is a bus controller designed for Intel 8086/8087/8088/8089 current
- 21:48, 22 June 2021 diff hist +129 N 8288 Created page with "= The Intel 8288 is a bus controller designed for Intel 8086/8087/8088/8089 = https://en.wikipedia.org/wiki/Intel_8288 link"
- 20:50, 22 June 2021 diff hist -24 ISA Backplane →POST Codes and what they mean
- 19:34, 22 June 2021 diff hist +1,427 Xi8088 Version 2.0 →Troubleshooting
- 22:34, 21 June 2021 diff hist -893 Xi8088 Version 2.0
- 17:33, 20 June 2021 diff hist +1,086 Xi8088 Version 2.0
- 16:33, 20 June 2021 diff hist +794 Xi8088 Version 2.0 →Processor Bootstrap
- 16:02, 20 June 2021 diff hist -1 Xi8088 Version 2.0 →Processor Bootstrap
- 15:31, 20 June 2021 diff hist +554 Xi8088 Version 2.0
- 14:52, 20 June 2021 diff hist +25 Xi8088 Version 2.0
- 14:50, 20 June 2021 diff hist +142 Xi8088 Version 2.0
- 13:49, 20 June 2021 diff hist +1,936 Xi8088 Version 2.0
- 13:09, 20 June 2021 diff hist +17 File:Ibm pc memory map.jpg current
- 13:03, 20 June 2021 diff hist 0 N File:Ibm pc memory map.jpg
- 13:39, 19 June 2021 diff hist +122 N 8284 Created page with "== Clock Generator for the 8088 == https://pdf1.alldatasheet.com/datasheet-pdf/view/124124/INTEL/8284A.html Datasheet" current
- 22:26, 18 June 2021 diff hist +111 8254 current
- 22:24, 18 June 2021 diff hist +120 8254
- 22:15, 18 June 2021 diff hist +86 8254
- 22:12, 18 June 2021 diff hist +110 74ALS74 current
- 22:04, 18 June 2021 diff hist +121 N 74F244 Created page with "== Octal Buffer Line Driver == [https://pdf1.alldatasheet.com/datasheet-pdf/view/173145/FAIRCHILD/74F244.html Datasheet]" current
- 22:00, 18 June 2021 diff hist +82 N 74ALS74 Created page with "[https://pdf1.alldatasheet.com/datasheet-pdf/view/27763/TI/74ALS74.html Datasheet]"
- 21:54, 18 June 2021 diff hist +88 N 74ALS00 Created page with "[https://pdf1.alldatasheet.com/datasheet-pdf/view/15230/PHILIPS/74ALS00A.html Datasheet]" current
- 19:28, 18 June 2021 diff hist +73 Xi8088 Version 2.0 →Non-Turbo clock is unstable or non existent
- 19:27, 18 June 2021 diff hist +46 Xi8088 Version 2.0 →Proposed Improvements
- 19:24, 18 June 2021 diff hist +452 N 8254 Created page with "The 82C54 is a programmable interval timer/counter. The 82C54 solves the problem of generation of accurate time delays under software control. Instead of setting up timing lo..."
- 18:15, 18 June 2021 diff hist +221 ISA Backplane
- 18:13, 18 June 2021 diff hist +30 Xi8088 Version 2.0
- 18:11, 18 June 2021 diff hist +102 Xi8088 Version 2.0 →Proposed Improvements
- 17:17, 18 June 2021 diff hist -92 Xi8088 Version 2.0 →Proposed Improvements
- 16:55, 18 June 2021 diff hist +243 Xi8088 Version 2.0 →Board Layout
- 16:54, 18 June 2021 diff hist -2 Xi8088 Version 2.0
- 16:53, 18 June 2021 diff hist +193 Xi8088 Version 2.0
- 16:45, 18 June 2021 diff hist +387 Xi8088 Version 2.0 →Proposed Improvements
- 23:38, 17 June 2021 diff hist +114 Xi8088 Version 2.0 →Proposed Improvements
- 23:35, 17 June 2021 diff hist +286 Xi8088 Version 2.0
- 16:18, 15 June 2021 diff hist 0 N File:74LS92 pin config.jpg current
- 16:18, 15 June 2021 diff hist 0 74LS92 →Divide-by-twelve counter current
- 16:17, 15 June 2021 diff hist +37 74LS92 →Divide-by-twelve counter
- 16:14, 15 June 2021 diff hist +281 N 74LS92 Created page with "= Divide-by-twelve counter = The '92 is a 4-stage ripple counter containing a high speed flip-flop acting as a divide-by-two and three flip-flops connected as a divide-by-six..."
- 14:19, 16 May 2021 diff hist 0 ISA Backplane →1. IC Sockets
- 13:41, 16 May 2021 diff hist +51 ISA Backplane →LED Display Configuration
- 12:00, 16 May 2021 diff hist +435 ISA Backplane →LED Display Configuration
- 11:53, 16 May 2021 diff hist +303 ISA Backplane →5 ATX Power connector
